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#1: Problem while inserting pciehp (PCI Express Hot-plug) driver

Posted on 2005-07-12 11:01:22 by Rajat Jain

Hi,

I'm trying to use the PCI Express Hot-Plug Controller driver
(pciehp.ko) with Kernel 2.6 so that I can get hot-plug events whenever
I add a card to my PCI Express slot.

I built the driver as a module, and am trying to load it manually
using modprobe. However, when trying to insert, I'm getting the
following error:

pciehp: acpi_pciehprm:\_SB.PCI0 _OSC fails=0x5
pciehp: Both _OSC and OSHP methods do not exist
FATAL: Error inserting pciehp
(/lib/modules/2.6.9-5.18AXcustom-hotplug/kernel/drivers/pci/ hotplug/pciehp.ko):
No such device

I do not know what exactly "_OSC" and "OSHP" methods mean? What does
it mean when both these methods are absent? Is there a problem with
the acpi? Or the pciehp?? I would appreciate if anyone could provide
me any pointers.

I passed the "pciehp_debug=1" parameter to modprobe and I'm attaching
the detailed messages at the end of the mail. Analysis showed that the
following functions are returning a status of 0x05

acpi_evaluate_object(ab->handle, METHOD_NAME_OSHP, NULL, &ret_buf)
pci_osc_control_set (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)

Any ind of help / pointers are apreciated.

TIA,

Rajat

---------------------------Debug Output-----------------------------


Jun 28 16:02:32 localhost kernel: pciehp: Initialize + Start the
notification/polling mechanism
Jun 28 16:02:32 localhost kernel: pciehp: Our event thread pid = 4360
Jun 28 16:02:32 localhost kernel: pciehp: !!!!event_thread sleeping
Jun 28 16:02:32 localhost kernel: pciehp: Initialize slot lists
Jun 28 16:02:32 localhost kernel: pciehp: pciehprm ACPI init <enter>
Jun 28 16:02:32 localhost kernel: pciehp: acpi_pciehprm: ROOT PCI
seg(0x0)bus(0x0)dev(0x0)func(0x0) [\_SB_.PCI0]
Jun 28 16:02:32 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure 0.
Jun 28 16:02:32 localhost kernel: pciehp: acpi_pciehprm:16-Bit Address
Space Resource
Jun 28 16:02:32 localhost kernel: pciehp: Resource Type: Bus Number
Range(fixed)
Jun 28 16:02:32 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:32 localhost kernel: pciehp: Positive decode
Jun 28 16:02:32 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:32 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:32 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:32 localhost kernel: pciehp: Address range min: 00000001
Jun 28 16:02:32 localhost kernel: pciehp: Address range max: 000000FF
Jun 28 16:02:32 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:32 localhost kernel: pciehp: Address Length: 000000FF
Jun 28 16:02:32 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:32 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure 1.
Jun 28 16:02:32 localhost kernel: pciehp: acpi_pciehprm:16-Bit Address
Space Resource
Jun 28 16:02:32 localhost kernel: pciehp: Resource Type: I/O Range
Jun 28 16:02:32 localhost kernel: pciehp: Type Specific: ISA and
non-ISA Io Addresses
Jun 28 16:02:32 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:32 localhost kernel: pciehp: Positive decode
Jun 28 16:02:32 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:32 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:32 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:32 localhost kernel: pciehp: Address range min: 00000000
Jun 28 16:02:32 localhost kernel: pciehp: Address range max: 00000CF7
Jun 28 16:02:32 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:32 localhost kernel: pciehp: Address Length: 00000CF8
Jun 28 16:02:32 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:32 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure 2.
Jun 28 16:02:32 localhost kernel: pciehp: Io Resource
Jun 28 16:02:32 localhost kernel: pciehp: 16 bit decode
Jun 28 16:02:32 localhost kernel: pciehp: Range minimum base: 00000CF8
Jun 28 16:02:32 localhost kernel: pciehp: Range maximum base: 00000CF8
Jun 28 16:02:32 localhost kernel: pciehp: Alignment: 00000001
Jun 28 16:02:32 localhost kernel: pciehp: Range Length: 00000008
Jun 28 16:02:32 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure 3.
Jun 28 16:02:32 localhost kernel: pciehp: acpi_pciehprm:16-Bit Address
Space Resource
Jun 28 16:02:32 localhost kernel: pciehp: Resource Type: I/O Range
Jun 28 16:02:32 localhost kernel: pciehp: Type Specific: ISA and
non-ISA Io Addresses
Jun 28 16:02:32 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:32 localhost kernel: pciehp: Positive decode
Jun 28 16:02:32 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:33 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:33 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:33 localhost kernel: pciehp: Address range min: 00000D00
Jun 28 16:02:33 localhost kernel: pciehp: Address range max: 0000FFFF
Jun 28 16:02:33 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:33 localhost kernel: pciehp: Address Length: 0000F300
Jun 28 16:02:33 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:33 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure 4.
Jun 28 16:02:33 localhost kernel: pciehp: acpi_pciehprm:32-Bit Address
Space Resource
Jun 28 16:02:33 localhost kernel: pciehp: Resource Type: Memory Range
Jun 28 16:02:33 localhost kernel: pciehp: Type Specific: Cacheable memory
Jun 28 16:02:33 localhost kernel: pciehp: Type Specific: Read/Write
Jun 28 16:02:33 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:33 localhost kernel: pciehp: Positive decode
Jun 28 16:02:33 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:33 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:33 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:33 localhost kernel: pciehp: Address range min: 000A0000
Jun 28 16:02:33 localhost kernel: pciehp: Address range max: 000BFFFF
Jun 28 16:02:33 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:33 localhost kernel: pciehp: Address Length: 00020000
Jun 28 16:02:33 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:33 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure 5.
Jun 28 16:02:33 localhost kernel: pciehp: acpi_pciehprm:32-Bit Address
Space Resource
Jun 28 16:02:33 localhost kernel: pciehp: Resource Type: Memory Range
Jun 28 16:02:33 localhost kernel: pciehp: Type Specific: Cacheable memory
Jun 28 16:02:33 localhost kernel: pciehp: Type Specific: Read Only
Jun 28 16:02:33 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:33 localhost kernel: pciehp: Positive decode
Jun 28 16:02:33 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:33 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:33 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:33 localhost kernel: pciehp: Address range min: 000C0000
Jun 28 16:02:33 localhost kernel: pciehp: Address range max: 000C3FFF
Jun 28 16:02:33 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:33 localhost kernel: pciehp: Address Length: 00000000
Jun 28 16:02:33 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:33 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure 6.
Jun 28 16:02:33 localhost kernel: pciehp: acpi_pciehprm:32-Bit Address
Space Resource
Jun 28 16:02:34 localhost kernel: pciehp: Resource Type: Memory Range
Jun 28 16:02:34 localhost kernel: pciehp: Type Specific: Cacheable memory
Jun 28 16:02:34 localhost kernel: pciehp: Type Specific: Read Only
Jun 28 16:02:34 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:34 localhost kernel: pciehp: Positive decode
Jun 28 16:02:34 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:34 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:34 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:34 localhost kernel: pciehp: Address range min: 000C4000
Jun 28 16:02:34 localhost kernel: pciehp: Address range max: 000C7FFF
Jun 28 16:02:34 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:34 localhost kernel: pciehp: Address Length: 00000000
Jun 28 16:02:34 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:34 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure 7.
Jun 28 16:02:34 localhost kernel: pciehp: acpi_pciehprm:32-Bit Address
Space Resource
Jun 28 16:02:34 localhost kernel: pciehp: Resource Type: Memory Range
Jun 28 16:02:34 localhost kernel: pciehp: Type Specific: Cacheable memory
Jun 28 16:02:34 localhost kernel: pciehp: Type Specific: Read Only
Jun 28 16:02:34 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:34 localhost kernel: pciehp: Positive decode
Jun 28 16:02:34 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:34 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:34 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:34 localhost kernel: pciehp: Address range min: 000C8000
Jun 28 16:02:34 localhost kernel: pciehp: Address range max: 000CBFFF
Jun 28 16:02:34 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:34 localhost kernel: pciehp: Address Length: 00000000
Jun 28 16:02:34 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:34 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure 8.
Jun 28 16:02:34 localhost kernel: pciehp: acpi_pciehprm:32-Bit Address
Space Resource
Jun 28 16:02:34 localhost kernel: pciehp: Resource Type: Memory Range
Jun 28 16:02:34 localhost kernel: pciehp: Type Specific: Cacheable memory
Jun 28 16:02:34 localhost kernel: pciehp: Type Specific: Read Only
Jun 28 16:02:34 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:34 localhost kernel: pciehp: Positive decode
Jun 28 16:02:34 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:34 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:34 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:35 localhost kernel: pciehp: Address range min: 000CC000
Jun 28 16:02:35 localhost kernel: pciehp: Address range max: 000CFFFF
Jun 28 16:02:35 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:35 localhost kernel: pciehp: Address Length: 00000000
Jun 28 16:02:35 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:35 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure 9.
Jun 28 16:02:35 localhost kernel: pciehp: acpi_pciehprm:32-Bit Address
Space Resource
Jun 28 16:02:35 localhost kernel: pciehp: Resource Type: Memory Range
Jun 28 16:02:35 localhost kernel: pciehp: Type Specific: Cacheable memory
Jun 28 16:02:35 localhost kernel: pciehp: Type Specific: Read Only
Jun 28 16:02:35 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:35 localhost kernel: pciehp: Positive decode
Jun 28 16:02:35 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:35 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:35 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:35 localhost kernel: pciehp: Address range min: 000D0000
Jun 28 16:02:35 localhost kernel: pciehp: Address range max: 000D3FFF
Jun 28 16:02:35 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:35 localhost kernel: pciehp: Address Length: 00000000
Jun 28 16:02:35 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:35 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure a.
Jun 28 16:02:35 localhost kernel: pciehp: acpi_pciehprm:32-Bit Address
Space Resource
Jun 28 16:02:35 localhost kernel: pciehp: Resource Type: Memory Range
Jun 28 16:02:35 localhost kernel: pciehp: Type Specific: Cacheable memory
Jun 28 16:02:35 localhost kernel: pciehp: Type Specific: Read Only
Jun 28 16:02:35 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:35 localhost kernel: pciehp: Positive decode
Jun 28 16:02:35 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:35 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:35 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:35 localhost kernel: pciehp: Address range min: 000D4000
Jun 28 16:02:35 localhost kernel: pciehp: Address range max: 000D7FFF
Jun 28 16:02:35 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:35 localhost kernel: pciehp: Address Length: 00000000
Jun 28 16:02:35 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:35 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure b.
Jun 28 16:02:35 localhost kernel: pciehp: acpi_pciehprm:32-Bit Address
Space Resource
Jun 28 16:02:35 localhost kernel: pciehp: Resource Type: Memory Range
Jun 28 16:02:35 localhost kernel: pciehp: Type Specific: Cacheable memory
Jun 28 16:02:36 localhost kernel: pciehp: Type Specific: Read/Write
Jun 28 16:02:36 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:36 localhost kernel: pciehp: Positive decode
Jun 28 16:02:36 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:36 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:36 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:36 localhost kernel: pciehp: Address range min: 000D8000
Jun 28 16:02:36 localhost kernel: pciehp: Address range max: 000DBFFF
Jun 28 16:02:36 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:36 localhost kernel: pciehp: Address Length: 00004000
Jun 28 16:02:36 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:36 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure c.
Jun 28 16:02:36 localhost kernel: pciehp: acpi_pciehprm:32-Bit Address
Space Resource
Jun 28 16:02:36 localhost kernel: pciehp: Resource Type: Memory Range
Jun 28 16:02:36 localhost kernel: pciehp: Type Specific: Cacheable memory
Jun 28 16:02:36 localhost kernel: pciehp: Type Specific: Read/Write
Jun 28 16:02:36 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:36 localhost kernel: pciehp: Positive decode
Jun 28 16:02:36 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:36 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:36 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:36 localhost kernel: pciehp: Address range min: 000DC000
Jun 28 16:02:36 localhost kernel: pciehp: Address range max: 000DFFFF
Jun 28 16:02:36 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:36 localhost kernel: pciehp: Address Length: 00004000
Jun 28 16:02:36 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:36 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure d.
Jun 28 16:02:36 localhost kernel: pciehp: acpi_pciehprm:32-Bit Address
Space Resource
Jun 28 16:02:36 localhost kernel: pciehp: Resource Type: Memory Range
Jun 28 16:02:36 localhost kernel: pciehp: Type Specific: Cacheable memory
Jun 28 16:02:36 localhost kernel: pciehp: Type Specific: Read Only
Jun 28 16:02:36 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:36 localhost kernel: pciehp: Positive decode
Jun 28 16:02:36 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:36 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:36 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:37 localhost kernel: pciehp: Address range min: 000E0000
Jun 28 16:02:37 localhost kernel: pciehp: Address range max: 000E3FFF
Jun 28 16:02:37 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:37 localhost kernel: pciehp: Address Length: 00000000
Jun 28 16:02:37 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:37 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure e.
Jun 28 16:02:37 localhost kernel: pciehp: acpi_pciehprm:32-Bit Address
Space Resource
Jun 28 16:02:37 localhost kernel: pciehp: Resource Type: Memory Range
Jun 28 16:02:37 localhost kernel: pciehp: Type Specific: Cacheable memory
Jun 28 16:02:37 localhost kernel: pciehp: Type Specific: Read Only
Jun 28 16:02:37 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:37 localhost kernel: pciehp: Positive decode
Jun 28 16:02:37 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:37 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:37 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:37 localhost kernel: pciehp: Address range min: 000E4000
Jun 28 16:02:37 localhost kernel: pciehp: Address range max: 000E7FFF
Jun 28 16:02:37 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:37 localhost kernel: pciehp: Address Length: 00000000
Jun 28 16:02:37 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:37 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure f.
Jun 28 16:02:37 localhost kernel: pciehp: acpi_pciehprm:32-Bit Address
Space Resource
Jun 28 16:02:37 localhost kernel: pciehp: Resource Type: Memory Range
Jun 28 16:02:37 localhost kernel: pciehp: Type Specific: Cacheable memory
Jun 28 16:02:37 localhost kernel: pciehp: Type Specific: Read Only
Jun 28 16:02:37 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:37 localhost kernel: pciehp: Positive decode
Jun 28 16:02:37 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:37 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:37 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:37 localhost kernel: pciehp: Address range min: 000E8000
Jun 28 16:02:37 localhost kernel: pciehp: Address range max: 000EBFFF
Jun 28 16:02:37 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:37 localhost kernel: pciehp: Address Length: 00000000
Jun 28 16:02:37 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:38 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure 10.
Jun 28 16:02:38 localhost kernel: pciehp: acpi_pciehprm:32-Bit Address
Space Resource
Jun 28 16:02:38 localhost kernel: pciehp: Resource Type: Memory Range
Jun 28 16:02:38 localhost kernel: pciehp: Type Specific: Cacheable memory
Jun 28 16:02:38 localhost kernel: pciehp: Type Specific: Read Only
Jun 28 16:02:38 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:38 localhost kernel: pciehp: Positive decode
Jun 28 16:02:38 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:38 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:38 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:38 localhost kernel: pciehp: Address range min: 000EC000
Jun 28 16:02:38 localhost kernel: pciehp: Address range max: 000EFFFF
Jun 28 16:02:38 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:38 localhost kernel: pciehp: Address Length: 00000000
Jun 28 16:02:38 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:38 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure 11.
Jun 28 16:02:38 localhost kernel: pciehp: acpi_pciehprm:32-Bit Address
Space Resource
Jun 28 16:02:38 localhost kernel: pciehp: Resource Type: Memory Range
Jun 28 16:02:38 localhost kernel: pciehp: Type Specific: Cacheable memory
Jun 28 16:02:38 localhost kernel: pciehp: Type Specific: Read/Write
Jun 28 16:02:38 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:38 localhost kernel: pciehp: Positive decode
Jun 28 16:02:38 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:38 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:38 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:38 localhost kernel: pciehp: Address range min: D0000000
Jun 28 16:02:38 localhost kernel: pciehp: Address range max: FEBFFFFF
Jun 28 16:02:38 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:38 localhost kernel: pciehp: Address Length: 2EC00000
Jun 28 16:02:38 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:38 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure 12.
Jun 28 16:02:38 localhost kernel: pciehp: acpi_pciehprm:32-Bit Address
Space Resource
Jun 28 16:02:38 localhost kernel: pciehp: Resource Type: Memory Range
Jun 28 16:02:38 localhost kernel: pciehp: Type Specific: Cacheable memory
Jun 28 16:02:38 localhost kernel: pciehp: Type Specific: Read/Write
Jun 28 16:02:39 localhost kernel: pciehp: Resource Producer
Jun 28 16:02:39 localhost kernel: pciehp: Positive decode
Jun 28 16:02:39 localhost kernel: pciehp: Min address is fixed
Jun 28 16:02:39 localhost kernel: pciehp: Max address is fixed
Jun 28 16:02:39 localhost kernel: pciehp: Granularity: 00000000
Jun 28 16:02:39 localhost kernel: pciehp: Address range min: 00000000
Jun 28 16:02:39 localhost kernel: pciehp: Address range max: 00000000
Jun 28 16:02:39 localhost kernel: pciehp: Address translation offset: 00000000
Jun 28 16:02:39 localhost kernel: pciehp: Address Length: 00000000
Jun 28 16:02:39 localhost kernel: pciehp: Resource Source Index: 0
Jun 28 16:02:39 localhost kernel: pciehp: acpi_pciehprm: PCI bus 0x0
Resource structure 13.
Jun 28 16:02:39 localhost kernel: pciehp: End_tag -------- Resource
Jun 28 16:02:39 localhost kernel: pciehp:
pciehp_resource_sort_and_combine: head = f7d1b7c8, *head = f5477d40
Jun 28 16:02:39 localhost kernel: pciehp: *head->next = 00000000
Jun 28 16:02:39 localhost kernel: pciehp:
pciehp_resource_sort_and_combine: head = f7d1b7c4, *head = f5477cc0
Jun 28 16:02:39 localhost kernel: pciehp: *head->next = f5477ca0
Jun 28 16:02:39 localhost kernel: pciehp: *head->base = 0xd00
Jun 28 16:02:39 localhost kernel: pciehp: *head->next->base = 0x0
Jun 28 16:02:39 localhost kernel: pciehp:
pciehp_resource_sort_and_combine: head = f7d1b7bc, *head = f6044fc0
Jun 28 16:02:39 localhost kernel: pciehp: *head->next = f5477f40
Jun 28 16:02:39 localhost kernel: pciehp: *head->base = 0xd0000000
Jun 28 16:02:39 localhost kernel: pciehp: *head->next->base = 0xd8000
Jun 28 16:02:39 localhost kernel: pciehp:
pciehp_resource_sort_and_combine: head = f7d1b7c0, *head = 00000000

Jun 28 16:02:39 localhost kernel: pciehp: add_host_bridge: status 5
Jun 28 16:02:39 localhost kernel: pciehp: add_host_bridge: status 5
run__osc_success 0 osc_exist 0

Jun 28 16:02:39 localhost kernel: pciehp: acpi_pciehprm: Registered
PCI HOST Bridge(00) on s:b:d:f(00:00:00:00) [\_SB_.PCI0]
Jun 28 16:02:39 localhost kernel: pciehp: acpi_pciehprm: P2P(0-1) on
pci=b:d:f(0:2:0) acpi=b:d:f(0:2:0) [\_SB_.PCI0.PE1A]
Jun 28 16:02:39 localhost kernel: pciehp: acpi_pciehprm: Registered
PCI P2P Bridge(00-01) on s:b:d:f(00:00:02:00) [\_SB_.PCI0.PE1A]
Jun 28 16:02:39 localhost kernel: pciehp: acpi_pciehprm: P2P(1-2) on
pci=b:d:f(1:0:0) acpi=b:d:f(1:0:0) [\_SB_.PCI0.PE1A.PXHA]
Jun 28 16:02:39 localhost kernel: pciehp: acpi_pciehprm: Registered
PCI P2P Bridge(01-02) on s:b:d:f(00:01:00:00) [\_SB_.PCI0.PE1A.PXHA]
Jun 28 16:02:39 localhost kernel: pciehp: acpi_pciehprm: P2P(1-3) on
pci=b:d:f(1:0:2) acpi=b:d:f(1:0:2) [\_SB_.PCI0.PE1A.PXHB]
Jun 28 16:02:39 localhost kernel: pciehp: acpi_pciehprm: Registered
PCI P2P Bridge(01-03) on s:b:d:f(00:01:00:02) [\_SB_.PCI0.PE1A.PXHB]
Jun 28 16:02:39 localhost kernel: pciehp: acpi_pciehprm: P2P(0-4) on
pci=b:d:f(0:4:0) acpi=b:d:f(0:4:0) [\_SB_.PCI0.PE2A]
Jun 28 16:02:39 localhost kernel: pciehp: acpi_pciehprm: Registered
PCI P2P Bridge(00-04) on s:b:d:f(00:00:04:00) [\_SB_.PCI0.PE2A]
Jun 28 16:02:39 localhost kernel: pciehp: acpi_pciehprm: P2P(0-5) on
pci=b:d:f(0:5:0) acpi=b:d:f(0:5:0) [\_SB_.PCI0.PE2B]
Jun 28 16:02:39 localhost kernel: pciehp: acpi_pciehprm: Registered
PCI P2P Bridge(00-05) on s:b:d:f(00:00:05:00) [\_SB_.PCI0.PE2B]
Jun 28 16:02:40 localhost kernel: pciehp: acpi_pciehprm: P2P(0-6) on
pci=b:d:f(0:6:0) acpi=b:d:f(0:6:0) [\_SB_.PCI0.PE3A]
Jun 28 16:02:40 localhost kernel: pciehp: acpi_pciehprm: Registered
PCI P2P Bridge(00-06) on s:b:d:f(00:00:06:00) [\_SB_.PCI0.PE3A]
Jun 28 16:02:40 localhost kernel: pciehp: acpi_pciehprm: P2P(0-f) on
pci=b:d:f(0:7:0) acpi=b:d:f(0:7:0) [\_SB_.PCI0.PE3B]
Jun 28 16:02:40 localhost kernel: pciehp: acpi_pciehprm: Registered
PCI P2P Bridge(00-0f) on s:b:d:f(00:00:07:00) [\_SB_.PCI0.PE3B]
Jun 28 16:02:40 localhost kernel: pciehp: acpi_pciehprm: P2P(0-10) on
pci=b:d:f(0:1e:0) acpi=b:d:f(0:1e:0) [\_SB_.PCI0.PCIB]
Jun 28 16:02:40 localhost kernel: pciehp: acpi_pciehprm: Registered
PCI P2P Bridge(00-10) on s:b:d:f(00:00:1e:00) [\_SB_.PCI0.PCIB]

Jun 28 16:02:40 localhost kernel: pciehp: Both _OSC and OSHP methods
do not exist

Jun 28 16:02:40 localhost kernel: pciehp: pciehprm_init:
run__osc_success 0 osc_exist 0
Jun 28 16:02:40 localhost kernel: pciehp: pciehprm_init:
run_oshp_success 0 oshp_exist 0pciehp: pciehprm ACPI init fail

Jun 28 16:02:40 localhost kernel: pciehp: Free ACPI PCI P2P
Bridge(1-2) [\_SB_.PCI0.PE1A.PXHA] on s:b:d:f(0:1:0:0)
Jun 28 16:02:40 localhost kernel: pciehp: Free ACPI PCI P2P
Bridge(1-3) [\_SB_.PCI0.PE1A.PXHB] on s:b:d:f(0:1:0:2)
Jun 28 16:02:40 localhost kernel: pciehp: Free ACPI PCI P2P
Bridge(0-1) [\_SB_.PCI0.PE1A] on s:b:d:f(0:0:2:0)
Jun 28 16:02:40 localhost kernel: pciehp: Free ACPI PCI P2P
Bridge(0-4) [\_SB_.PCI0.PE2A] on s:b:d:f(0:0:4:0)
Jun 28 16:02:40 localhost kernel: pciehp: Free ACPI PCI P2P
Bridge(0-5) [\_SB_.PCI0.PE2B] on s:b:d:f(0:0:5:0)
Jun 28 16:02:40 localhost kernel: pciehp: Free ACPI PCI P2P
Bridge(0-6) [\_SB_.PCI0.PE3A] on s:b:d:f(0:0:6:0)
Jun 28 16:02:40 localhost kernel: pciehp: Free ACPI PCI P2P
Bridge(0-f) [\_SB_.PCI0.PE3B] on s:b:d:f(0:0:7:0)
Jun 28 16:02:40 localhost kernel: pciehp: Free ACPI PCI P2P
Bridge(0-10) [\_SB_.PCI0.PCIB] on s:b:d:f(0:0:1e:0)
Jun 28 16:02:40 localhost kernel: pciehp: Free ACPI PCI HOST Bridge(0)
[\_SB_.PCI0] on s:b:d:f(0:0:0:0)

Jun 28 16:02:40 localhost kernel: pciehp: event_thread finish command given
Jun 28 16:02:40 localhost kernel: pciehp: wait for event_thread to exit
Jun 28 16:02:40 localhost kernel: pciehp: event_thread woken finished = 1
Jun 28 16:02:40 localhost kernel: pciehp: event_thread signals exit
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#2: Re: Problem while inserting pciehp (PCI Express Hot-plug) driver

Posted on 2005-07-13 00:52:25 by Greg KH

On Tue, Jul 12, 2005 at 06:01:22PM +0900, Rajat Jain wrote:
> Hi,
>
> I'm trying to use the PCI Express Hot-Plug Controller driver
> (pciehp.ko) with Kernel 2.6 so that I can get hot-plug events whenever
> I add a card to my PCI Express slot.
>
> I built the driver as a module, and am trying to load it manually
> using modprobe. However, when trying to insert, I'm getting the
> following error:
>
> pciehp: acpi_pciehprm:\_SB.PCI0 _OSC fails=0x5
> pciehp: Both _OSC and OSHP methods do not exist
> FATAL: Error inserting pciehp
> (/lib/modules/2.6.9-5.18AXcustom-hotplug/kernel/drivers/pci/ hotplug/pciehp.ko):
> No such device

Your bios does not support pci express hotplug. Are you sure you have
pci express hotplug hardware in your system? If so, contact your bios
vendor to get an updated version.

Good luck,

greg k-h
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#3: Re: Re: Problem while inserting pciehp (PCI Express Hot-plug) driver

Posted on 2005-07-25 04:49:22 by Rajat Jain

> On Tue, Jul 12, 2005 at 06:01:22PM +0900, Rajat Jain
> wrote:
>
> > Hi,
> >=20
> > I'm trying to use the PCI Express Hot-Plug Controller driver
> > (pciehp.ko) with Kernel 2.6 so that I can get hot-plug events=20
> > whenever I add a card to my PCI Express slot.
> >=20
> > I built the driver as a module, and am trying to load it=20
> > manually using modprobe. However, when trying to insert,
> > I'm getting the following error:
> >
> > pciehp: acpi_pciehprm:\_SB.PCI0 _OSC fails=3D0x5
> > pciehp: Both _OSC and OSHP methods do not exist
> > FATAL: Error inserting pciehp
> >
> > (/lib/modules/2.6.9-5.18AXcustom-hotplug/kernel/drivers/pci/ hotplug/pci=
ehp.ko):
> > No such device
> >

> --- Greg KH <greg-U8xfFu+wG4EAvxtiuMwx3w@public.gmane.org> wrote:
> Your bios does not support pci express hotplug. Are
> you sure you have pci express hotplug hardware in your
> system? If so, contact your bios vendor to get an=20
> updated version.
>=20
> Good luck,
>=20
> greg k-h

Thanks for replying Greg. I checked again, I have the hardware in my
system. I asked the vendor for bios update, but he says mine is the
latest version.

I downloaded the Intel "iasl" compiler
(http://developer.intel.com/technology/iapc/acpi/downloads.h tm), and
used it to decompile "/proc/acpi/dsdt" file (in AML) to its equivalent
ACPI source code. I could not find the _OSC and OSHP control methods
there. Is this information sufficient enough to deduce that I need a
BIOS update? And the hardware is OK but the problem is with the bios?

Just out of curosity, I would appreciate if you could provide me
pointers to OSHP and _OSC methods. What exactly do they mean? Does
every hardware containing a hot-plug controller necessarily has to
implement them both? I checked with ACPI Specs but it contains no
refrence to "OSHP" method.

Any pointers are more than appreciated,

TIA,

Rajat


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#4: Re: Re: Problem while inserting pciehp (PCI Express Hot-plug) driver

Posted on 2005-07-27 20:29:39 by Kristen Accardi

On 7/24/05, Rajat Jain <rajat.noida.india-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> > On Tue, Jul 12, 2005 at 06:01:22PM +0900, Rajat Jain
> > wrote:
> >
> > > Hi,
> > >
> > > I'm trying to use the PCI Express Hot-Plug Controller driver
> > > (pciehp.ko) with Kernel 2.6 so that I can get hot-plug events
> > > whenever I add a card to my PCI Express slot.
> > >
> > > I built the driver as a module, and am trying to load it
> > > manually using modprobe. However, when trying to insert,
> > > I'm getting the following error:
> > >
> > > pciehp: acpi_pciehprm:\_SB.PCI0 _OSC fails=3D0x5
> > > pciehp: Both _OSC and OSHP methods do not exist
> > > FATAL: Error inserting pciehp
> > >
> > > (/lib/modules/2.6.9-5.18AXcustom-hotplug/kernel/drivers/pci/ hotplug/p=
ciehp.ko):
> > > No such device
> > >
>=20
> > --- Greg KH <greg-U8xfFu+wG4EAvxtiuMwx3w@public.gmane.org> wrote:
> > Your bios does not support pci express hotplug. Are
> > you sure you have pci express hotplug hardware in your
> > system? If so, contact your bios vendor to get an
> > updated version.
> >
> > Good luck,
> >
> > greg k-h
>=20
> Thanks for replying Greg. I checked again, I have the hardware in my
> system. I asked the vendor for bios update, but he says mine is the
> latest version.
>=20
> I downloaded the Intel "iasl" compiler
> (http://developer.intel.com/technology/iapc/acpi/downloads.h tm), and
> used it to decompile "/proc/acpi/dsdt" file (in AML) to its equivalent
> ACPI source code. I could not find the _OSC and OSHP control methods
> there. Is this information sufficient enough to deduce that I need a
> BIOS update? And the hardware is OK but the problem is with the bios?
>=20
> Just out of curosity, I would appreciate if you could provide me
> pointers to OSHP and _OSC methods. What exactly do they mean? Does
> every hardware containing a hot-plug controller necessarily has to
> implement them both? I checked with ACPI Specs but it contains no
> refrence to "OSHP" method.
>=20
> Any pointers are more than appreciated,
>=20
> TIA,
>=20
> Rajat

Hi Rajat, you can learn more about the OSHP method by reading the PCI
express spec. It is used to tell an ACPI bios that the OS will be
handling the hotplug events natively. It may be that your BIOS does
not allow native hotplug for pcie, in which case you need to be using
the acpiphp driver instead of the pciehp driver. You could just try
modprobing acpiphp and see if this will handle the hotplug events. A
recent version of lspci (which understands pcie) will tell you as well
if pcie hotplug capability is supported (lspci -vv).

> -
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" i=
n
> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
>


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#5: Re: Re: Problem while inserting pciehp (PCI Express Hot-plug) driver

Posted on 2005-07-28 12:45:49 by Rajat Jain

>=20
> Hi Rajat, you can learn more about the OSHP method by reading the PCI
> express spec. It is used to tell an ACPI bios that the OS will be
> handling the hotplug events natively. It may be that your BIOS does
> not allow native hotplug for pcie, in which case you need to be using
> the acpiphp driver instead of the pciehp driver. You could just try
> modprobing acpiphp and see if this will handle the hotplug events. A
> recent version of lspci (which understands pcie) will tell you as well
> if pcie hotplug capability is supported (lspci -vv).
>=20

Okay. I'm sorry but I'm not very clear with this. I'm just putting
down here my understanding. So basically we have two mutually
EXCLUSIVE hotplug drivers I can use for PCI Express:

1) "pciehp.ko" : We use this PCIE HP driver when our BIOS supports
Native Hot-plug for PCI Express (which means that hot-plug will be
handled by OS single handedly).

2) "acpiphp.ko" : We use this "generic" ACPI HP driver when BIOS
allows only ITSELF to handle hot-plug events.

Is my understanding correct? I would appreciate if you could help me
gain a grip on this.

Thanks a lot for the useful info you gave. Provided me with a new
direction to work on.

Regards,

Rajat


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#6: Re: Re: Problem while inserting pciehp (PCI Express Hot-plug) driver

Posted on 2005-07-28 19:00:14 by Kristen Accardi

On 7/28/05, Rajat Jain <rajat.noida.india@gmail.com> wrote:
> >
> > Hi Rajat, you can learn more about the OSHP method by reading the PCI
> > express spec. It is used to tell an ACPI bios that the OS will be
> > handling the hotplug events natively. It may be that your BIOS does
> > not allow native hotplug for pcie, in which case you need to be using
> > the acpiphp driver instead of the pciehp driver. You could just try
> > modprobing acpiphp and see if this will handle the hotplug events. A
> > recent version of lspci (which understands pcie) will tell you as well
> > if pcie hotplug capability is supported (lspci -vv).
> >
>=20
> Okay. I'm sorry but I'm not very clear with this. I'm just putting
> down here my understanding. So basically we have two mutually
> EXCLUSIVE hotplug drivers I can use for PCI Express:
>=20
> 1) "pciehp.ko" : We use this PCIE HP driver when our BIOS supports
> Native Hot-plug for PCI Express (which means that hot-plug will be
> handled by OS single handedly).
>=20
> 2) "acpiphp.ko" : We use this "generic" ACPI HP driver when BIOS
> allows only ITSELF to handle hot-plug events.

usually this is configurable. So, you can configure you BIOS to use
acpi to handle hot-plug, or you can allow the OS to handle it. Most
OS (from what I hear) don't actually implement native hotplug support,
so native hotplug support is probably not as big a priority for bios
writers as the acpi support. so, it doesn't surprise me to find some
that don't support native.

you can run the native hotplug driver on a system who's bios supports
acpi - if it provides the OSHP method, this tells the bios to allow
the OS to handle it.

>=20
> Is my understanding correct? I would appreciate if you could help me
> gain a grip on this.

i'm trying to gain a grip myself, as i've just started learning about
pcie :). someone else hopefully will correct me if i'm telling you
the wrong info.


>=20
> Thanks a lot for the useful info you gave. Provided me with a new
> direction to work on.
>=20
> Regards,
>=20
> Rajat
>=20

Kristen


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#7: Re: Re: Problem while inserting pciehp (PCI Express Hot-plug) driver

Posted on 2005-07-29 02:52:17 by Rajesh Shah

On Thu, Jul 28, 2005 at 07:45:49PM +0900, Rajat Jain wrote:
>
> Okay. I'm sorry but I'm not very clear with this. I'm just putting
> down here my understanding. So basically we have two mutually
> EXCLUSIVE hotplug drivers I can use for PCI Express:
>
A hotplug slot can be controlled only by a single hotplug
technology - pcie shpc or acpiphp. However, different parts of
the I/O hierarchy can be controlled by different technologies.
For example, a host bridge I/O complex can be hotplugged using
acpiphp, but end devices under this IO complex may be hotpplugged
using pcie or shpc hotplug.

> 1) "pciehp.ko" : We use this PCIE HP driver when our BIOS supports
> Native Hot-plug for PCI Express (which means that hot-plug will be
> handled by OS single handedly).
>
> 2) "acpiphp.ko" : We use this "generic" ACPI HP driver when BIOS
> allows only ITSELF to handle hot-plug events.
>
No, acpi hotplug is not handled by BIOS only.
Both acpi and pcie hotplug need firmware support as well as hardware
support. Hardware in many (but not all) systems support both types of
hotplug and its up to the BIOS to decide which type to support. If the
platform supports pcie hotplug, you see an _OSC & _SUN methods in the
ACPI namespace and the pciehp driver controls hotplug slots. If the
system supports acpi hotplug, you see _ADR and _EJ0 methods in the ACPI
namespace and the acpiphp driver controls the corresponding hotplug slots.

Rajesh


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#8: Re: Re: Problem while inserting pciehp (PCI Express Hot-plug) driver

Posted on 2005-07-29 12:23:40 by Rajat Jain

On 7/29/05, Rajesh Shah <rajesh.shah@intel.com> wrote:
> On Thu, Jul 28, 2005 at 07:45:49PM +0900, Rajat Jain wrote:
> >
> > Okay. I'm sorry but I'm not very clear with this. I'm just putting
> > down here my understanding. So basically we have two mutually
> > EXCLUSIVE hotplug drivers I can use for PCI Express:
> >
> A hotplug slot can be controlled only by a single hotplug
> technology - pcie shpc or acpiphp. However, different parts of
> the I/O hierarchy can be controlled by different technologies.
> For example, a host bridge I/O complex can be hotplugged using
> acpiphp, but end devices under this IO complex may be hotpplugged
> using pcie or shpc hotplug.
>=20
> > 1) "pciehp.ko" : We use this PCIE HP driver when our BIOS supports
> > Native Hot-plug for PCI Express (which means that hot-plug will be
> > handled by OS single handedly).
> >
> > 2) "acpiphp.ko" : We use this "generic" ACPI HP driver when BIOS
> > allows only ITSELF to handle hot-plug events.
> >
> No, acpi hotplug is not handled by BIOS only.
> Both acpi and pcie hotplug need firmware support as well as hardware
> support. Hardware in many (but not all) systems support both types of
> hotplug and its up to the BIOS to decide which type to support. If the
> platform supports pcie hotplug, you see an _OSC & _SUN methods in the
> ACPI namespace and the pciehp driver controls hotplug slots. If the
> system supports acpi hotplug, you see _ADR and _EJ0 methods in the ACPI
> namespace and the acpiphp driver controls the corresponding hotplug slots=
..
>=20
> Rajesh
>=20

Thanks a lot. It has proved to be a very useful information for me. I
can now do some R&D on it.

Thanks again,

Rajat


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#9: Re: Re: Problem while inserting pciehp (PCI Express Hot-plug) driver

Posted on 2005-07-30 18:20:30 by kylin

n the latest update of the Intel's E7520 MCH,the very NOTFIX entry
caught my eye:
//////////////////////
PCI Express Hot-Plug MSI interrupt issue
////////////////////
Problem:
During a link down state, the MCH will not send MSI interrupts to the
front side bus. In general
MSI messages need not be delivered when the link is down, but in the
event that MSI interrupt routing is used on Hot-Plug events, the
processor will wait indefinitely for this interrupt. Waiting for
command complete interrupts is a normal part of the steps in the
orderly removal process, and link down will occur at the point that
power is removed from the slot. Subsequent accesses to the slot
control register to update indicators and power control will not
generate the expected MSI interrupts from the MCH until slot power is
restored, and the link is back up.
Implication:
Hot-Plug software written to wait for command complete interrupts will
hang in MSI interrupt mode.
Workaround:
Run in either of the other two interrupt modes (the "legacy" method
using the MCHGPE# to signal
hot-plug interrupts to the ICH or "native" interrupt mode using PCI
interrupts (INTA#)).
Alternatively in MSI mode, software may poll for command complete
rather than wait for MSI, or implement the command complete timeout to
continue to the next slot control update rather than repeat the
current slot control update
I wonder if i can workaround the MSI using the polling way on the
server geared by E7520 and the firmware with no OSC implemented


--=20
we who r about to die,salute u!


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#10: Re: Re: Problem while inserting pciehp (PCI Express Hot-plug) driver

Posted on 2005-08-03 19:49:43 by Rajesh Shah

On Sun, Jul 31, 2005 at 12:20:30AM +0800, kylin wrote:
> I wonder if i can workaround the MSI using the polling way on the
> server geared by E7520 and the firmware with no OSC implemented
>
Per the PCI firmware spec (I'm looking at draft 0.9, version 3.0),
the OS must explicitly get control of native pcie hotplug from
firmware using _OSC before trying to use it. Firmware may be
deliberately not creating an _OSC because it is controlling the
hotplug hardware, or may be aware of other reasons (e.g. errata)
why OS native pcie hotplug should not be used on this platform.
So no, I don't think we can load and use pciehp if there's
no _OSC implemented in firmware.

Rajesh


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